BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI
WORK INTEGRATED LEARNING PROGRAMMES
Digital Learning
Part A: Course Design
|
Course Title
|
Embedded
System Design
|
|
Course No(s)
|
EEEZG512
|
|
Credit Units
|
4
|
|
Credit Model
|
1-1-2
|
|
Content Authors
|
Meetha
V Shenoy
|
Course
Description
Introduction to embedded systems;
embedded architectures; Architectures and programming of microcontrollers and
DSPs; Embedded applications and technologies; power issues in system design;
introduction to software and hardware co-design.
Scope
and Objective of the course
The course covers the design issues involved in
embedded systems and system-on-chip technologies. The course also deals with
the applications and programming languages used for embedded systems.
Course Objectives
|
No
|
Course Objective
|
|
CO1
|
Introduce Hardware and Software Components of Embedded Systems
|
|
CO2
|
Introduce the challenges in system
design and develop system design skills
|
|
CO3
|
Develop basic programming skills
required for designing Embedded systems
|
|
CO4
|
Introduction to advanced topics of
research in the field of Embedded Systems
|
Text Book(s)
|
T1
|
Wolf, Wayne, Computers as Components – Principles
of Embedded Computing System Design, Second Edition, Morgan-Kaufmann, 2010.
|
Reference Book(s) & other resources
|
R1
|
James.K.Peckol, Embedded System Design
– A Contemporary Design Tool, Wiley
Student Edition, 2010
|
|
R2
|
Steve Furber, ARM System-on-chip
Architecture, Second Edition, Pearson, 2007
|
|
R3
|
The Unified Modeling Language
Reference Manual, by James Rumbaugh, Ivar Jacobson, Grady Booch,
Addison-Wesley, 1999
|
|
R4
|
P. A. Laplante & S. J. Ovaska,
Real-Time Systems Design and Analysis: Tools for the Practitioner, Wiley, 4th
edition
|
|
R5
|
Kamal, Raj, Embedded Systems:
Architecture, Programming & Design, Tata McGraw Hill, 2nd Ed., 2008
|
|
R6
|
The Definitive Guide to ARM Cortex
M3/M4 Processors. Third Edition. Joseph Yiu
|
|
R7
|
Reference Manuals/ Published Papers
a)8051 Microcontroller- Hardware
Manual
b)8051RE2 Reference Manual
c)ARM CPU Reference Manual
d)LPC 23xx Reference Manual
e)TI DSP 64xx Manual
Note : Required manual and reference
papers will be uploaded on course website .
|
Content Structure
1.
Introduction to Embedded System
1.1.
Introduction
1.1.1.
Characteristics and
Embodiments of Embedded System
1.1.2.
Classification of Embedded
Systems
1.1.3.
Introduction to Hardware
and Software components of an Embedded System
1.2.
Hardware Components of
Embedded System
1.2.1.
Introduction to Processor
Architectures
1.2.2.
Memory Types Organization,
Cache
1.2.3.
Interrupts
1.2.4.
Basic peripherals like
Timers , ADC/DAC
1.3.
Software components of
Embedded System
1.3.1.
RTOS & Tasks
1.3.2.
Introduction to SOC
design, Embedded System Design Process/Flow
2.
Small Scale Embedded System Design
2.1.
Problem Specification
2.1.1.
User and System Design
Requirements
2.1.2.
System Block Diagram
Development
2.1.3.
Selection of Hardware and
Software – Considerations
2.1.4.
Hardware/Software design
& Testing Considerations
2.1.5.
Final System Design
3.
Embedded Architecture 1 – RISC ARM Architecture
3.1.
Introduction to ARM CPU
Architecture
3.2.
Programmers Model of ARM
CPU
3.2.1.
Register Organization
3.2.2.
Operating Modes
3.2.3.
Pipelining
3.2.4.
ARM Exception Handling
3.3.
ARM Instruction Set
4.
Embedded Architecture 2 –ARM Based Microcontrollers
4.1.
Introduction to LPC23xx
4.1.1.
AMBA Bus Architecture
4.1.2.
GPIO, Timer, Watch dog
4.1.3.
Interrupt Handling -VIC ,
ADC/DAC
4.1.4.
DMAC
4.2.
Communication Peripherals-
Synchronous & Asynchronous
4.2.1.
SPI , I2C , I2S , UART
4.2.2.
CAN
4.2.3.
USB
4.3.
Introduction to ARM Cortex
Architectures
4.3.1.
ARM Cortex-M Architecture
4.3.2.
Board Design - System
Booting related Concepts
5.
Embedded Architecture 3 –DSP Processors
5.1.
Introduction to VLIW &
DSP architectures
5.1.1.
Fixed and Floating point Datapath
/DSP including Numeric Representation
5.1.2.
DSP Architectures -
Characteristics
5.2.
TMS 64X+ CPU Architecture
–Addressing Modes
5.2.1.
TMS 64X+ CPU Introduction
5.2.2.
Computational Unit
5.2.3.
Instruction Set
5.3.
TMS 6455 Programmers Model
5.3.1.
Modes of Operation
5.3.2.
Exceptions, Interrupts
6.
Distributed and Multiprocessor based System Design
6.1.
Introduction to
Multiprocessor , Distributed and Networked Embedded Systems
6.2.
Case Studies – Distributed
and Multiprocessor Systems
7.
Embedded Software Design
7.1.
System Modeling
7.1.1.
Hardware software partitioning
7.1.2.
System Modeling using UML
7.2.
Compilers, Assemblers and
Debuggers for Embedded Sytems
7.3.
Embedded C Programming
7.3.1.
Memory Management , Shared
Memory
7.3.2.
System Initialization
8.
Embedded Software
8.1.
Tasks & Task
management , Context Switching
8.2.
RTS –Task Scheduling
Concepts , Semaphore, Mutex, Deadlocks
8.3.
Multitasking using ARM
Cortex M Architectures – Introduction to RTOS Design
9.
Advanced Embedded System Concepts
9.1.
Performance Analysis and
Optimization
9.2.
Accelerated Embedded
System
9.3.
Fault Tolerance and
Reliability
Part B: Contact Session Plan
|
Academic Term
|
First
Semester 2016-2017
|
|
Course Title
|
Embedded
System Design
|
|
Course No
|
EEEZG512
|
|
Content Developer
|
Meetha
V Shenoy
|
Glossary of Terms:
1.
Contact Hour (CH) stands
for a hour long live session with students conducted either in a physical
classroom or enabled through technology. In this model of instruction,
instructor led sessions will be for 20 CH.
a.
Pre CH = Self Learning
done prior to a given contact hour
b.
During CH = Content to be
discussed during the contact hour by the course instructor
c.
Post CH = Self Learning
done post the contact hour
2.
RL stands for Recorded
Lecture or Recorded Lesson. It is presented to the student through an online
portal. A given RL unfolds as a sequences of video segments interleaved with
exercises
3.
SS stands for Self-Study to be done as a study
of relevant sections from textbooks and reference books. It could also include
study of external resources.
4.
LE stands for Lab
Exercises
5.
HW stands for Home Work
will consists could be a selection of problems from the text.
Contact Hour 1
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL1.1
|
RL1.1.1
RL1.1.2
|
T1 ,R5
|
|
Pre CH
|
RL1.2
|
RL 1.2.1
RL 1.2.2
RL 1.2.3
RL 1.2.4
|
T1 , R5
|
|
During CH
|
CH1
|
CH1.1
|
|
Contact Hour 2
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL1.2
|
RL 1.2.5
RL 1.2.6
|
T1
|
|
Pre CH
|
RL1.3
|
RL 1.3.1
RL 1.3.2
|
T1
|
|
Post CH
|
HW2
|
|
Questions – discussed during CH(Home
work is for self-evaluation-Non evaluative )
|
|
Post CH
|
LE2
|
Installation of KEIL Software for ARM
Microcontroller
|
Lab Exercise- uploaded on Course
Website.
|
Contact Hour 3
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL3.1
RL3.2
|
RL3.1.1
RL3.2.1
|
R2
|
|
During CH
|
CH3
|
CH3.1
|
|
Contact Hour 4
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL3.2
|
RL3.2.2
RL3.2.3
|
R2
|
|
During CH
|
CH4
|
CH4.1
|
Discussion + KEIL Software Demo
|
|
Post CH
|
SS4
|
8-bit microcontroller Architecture-
8051 – Pin, External Memory Interfacing, Peripherals, Interrupts.
|
80c51RE2/ED2 Data sheets -Ref [6]
|
|
Post CH
|
LE4
|
|
Lab Exercise- uploaded on Course
Website and the exercise discussed during CH
|
Contact Hour 5
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL4.1
|
RL4.1.1
RL4.1.2
RL4.1.3
RL 4.1.4
|
R7- ARM Datasheets
|
|
During CH
|
CH5
|
CH5.1
|
Exception Handling in ARMv4. Reference
R2,R5
|
|
Post CH
|
SS5
|
8-bit microcontroller Architecture-
8051 – Pin , External Memory Interfacing , Peripherals , Interrupts .
|
Data sheets , Ref [6]
|
|
Post CH
|
HW5
|
|
Q1 of Assignment 1 .
|
Contact Hour 6
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL4.1
RL 4.2
|
RL4.1.5
RL4.2.1
RL4.2.2
|
R7- ARM datasheets
|
|
During CH
|
CH6
|
CH6.1
|
Case Study Based on Timer and ADC
peripherals. (Keil Software Demo )
|
|
Post CH
|
SS6
|
RL 2.1.1
RL 2.2.1
RL 2.3.1
RL2.3.2
RL2.3.2
RL.2.3.4
|
|
|
Post CH
|
HW6
|
|
Q2 of Assignment 1
|
Contact Hour 7
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL4.2
|
RL4.2.3
RL4.2.4
|
R7 – ARM datsheets
|
|
During CH
|
CH7
|
CH7.1
|
Case Study Based on Timer, VIC and ADC
peripherals. (Keil Software Demo )
|
|
Post CH
|
SS7
|
8-bit microcontroller Architecture-
8051 – Pin , External Memory Interfacing , Peripherals , Interrupts .
|
Data sheets , Ref [6]
|
Contact Hour 8
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL.2.3
|
RL 2.3.1
RL2.3.2
RL2.3.2
RL.2.3.4
|
R7-89C51RE2 datasheets
|
|
During CH
|
CH8
|
CH8.1
|
Discussion + Asynchronous Serial
protocols
|
Contact Hour 9
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH9
|
CH9.1
|
System Design Example I : Case Study
|
|
Post CH
|
SS9
|
|
Solve the Case Study discussed in CH
|
Contact Hour 10
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL5.1
|
RL5.1.1
RL5.1.2
RL5.1.3
RL5.1.4
RL5.1.5
|
R7 – TI DSP Datasheets , R1
|
|
During CH
|
CH10
|
CH10.1
|
System Design Example I : Case Study
|
|
Post CH
|
SS10
|
|
Solve the Case Study discussed in CH
|
Contact Hour 11
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL5.2
|
RL5.2.1
RL5.2.2
RL5.2.3
RL5.2.4
|
R7– TI DSP Datasheets , R1
|
|
During CH
|
CH11
|
CH11.1
|
|
Contact Hour 12
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL5.3
|
RL5.3.1
RL5.3.2
RL5.3.3
|
R7 – TI DSP Datasheets
|
|
During CH
|
CH12
|
CH12.1
|
|
|
Post CH
|
SS12
|
|
|
|
Post CH
|
LE12
|
|
Lab exercise on DSP module- Will be
uploaded on Course Website.
|
Contact Hour 13
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH13
|
CH13.1
|
R7 – TI DSP Datasheets , R1
|
|
Post CH
|
SS13
|
|
Self-Study Topic will be discussed
during CH
|
Contact Hour 14
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL8.1
RL8.2
RL8.3
|
RL 8.1.1
RL 8.2.1
RL 8.3.1
|
R1
|
|
During CH
|
CH14
|
CH14.1
|
|
|
Post CH
|
SS14
|
RL6.1
RL6.2 (RL.6.2.1 ,RL.6.2.2, RL.6.2.3,RL.6.2.4)
|
|
|
Post CH
|
HW14
|
|
Case Study based on Multi processor
System
|
Contact Hour 15
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
Pre CH
|
RL6.3
|
RL6.3.1
RL6.3.2
RL6.3.3
|
|
|
During CH
|
CH15
|
CH15.1 ARM
Cortex M based task switching
|
R6
|
|
Post CH
|
HW15
|
|
Case Study based on Multi processor
System
|
Contact Hour 16
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH16
|
CH16.1 ARM
Cortex M based task switching
|
R6
|
|
Post CH
|
SS16
|
RL 7.1
RL 7.2
RL 7.3
|
R3
|
|
Post CH
|
HW16
|
|
Question provided in Class
|
Contact Hour 17
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH17
|
CH17.1 = ARM
Cortex M based task switching
|
R6
|
Contact Hour 18
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH18
|
CH18.1
|
Case Study for Distributed Embedded
System
|
Contact Hour 19
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH19
|
CH19.1 System
Booting Process – Board design Concepts. Embedded C Advanced Concepts
|
|
|
Post CH
|
SS19
|
|
Self-Reading material will be given
during class.
|
Contact Hour 20
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH20
|
CH20.1 Module
9 : Performance Analysis Optimization
|
R1 ,T1
|
|
Post CH
|
SS20
|
|
|
Contact Hour 21
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH21
|
CH21.1
Module 9 : Accelerated Systems
|
T1
|
|
Post CH
|
SS21
|
|
Reference material will be discussed
in CH
|
Contact Hour 22
|
Time
|
Type
|
Sequence
|
Content Reference
|
|
During CH
|
CH22
|
CH22.1
Module 9 : Fault tolerance and
Reliability
|
R1
|
|
Post CH
|
HW22
|
|
|
Evaluation Scheme:
Legend: EC = Evaluation Component; AN =
After Noon Session; FN = Fore Noon Session
|
No
|
Name
|
Type
|
Duration
|
Weight
|
Day, Date, Session, Time
|
|
EC-1
|
Quiz-I/ Assignment-I
|
Online
|
-
|
5%
|
September 1-10, 2016
|
|
|
Quiz-II
|
Online
|
|
5%
|
October 1-10, 2016
|
|
|
Lab
|
Online
|
|
10
|
|
|
EC-2
|
Mid-Semester Test
|
Closed Book
|
2 hours
|
30%
|
25/09/2016 (AN) 2 PM TO 4 PM
|
|
EC-3
|
Comprehensive Exam
|
Open Book
|
3 hours
|
50%
|
06/11/2016 (AN) 2 PM TO 5 PM
|
Syllabus for Mid-Semester Test (Closed
Book): Topics in Session Nos. 1 TO 11
Syllabus for Comprehensive Exam (Open
Book): All topics (Session Nos. 1 to 22)
Important links and information:
Elearn portal:
https://elearn.bits-pilani.ac.in
Students are expected to visit the
Elearn portal on a regular basis and stay up to date with the latest
announcements and deadlines.
Contact sessions: Students should attend the online lectures as per the
schedule provided on the Elearn portal.
Evaluation Guidelines:
1.
EC-1 consists of either three
Assignments. Students will attempt them through the course pages on the Elearn
portal. Announcements will be made on the portal, in a timely manner.
2.
For Closed Book tests: No books or
reference material of any kind will be permitted.
3.
For Open Book exams: Use of books and
any printed / written reference material (filed or bound) is permitted.
However, loose sheets of paper will not be allowed. Use of calculators is
permitted in all exams. Laptops/Mobiles of any kind are not allowed. Exchange
of any material is not allowed.
4.
If a student is unable
to appear for the Regular Test/Exam due to genuine exigencies, the student
should follow the procedure to apply for the Make-Up Test/Exam which will be
made available on the Elearn portal. The Make-Up Test/Exam will be conducted
only at selected exam centres on the dates to be announced later.
It shall be the responsibility of the
individual student to be regular in maintaining the self study schedule as
given in the course handout, attend the online lectures, and take all the
prescribed evaluation components such as Assignment , Mid-Semester Test and
Comprehensive Exam according to the evaluation scheme provided in the handout.
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